The present invention relates to radio frequency (RF) power amplifiers and more particularly to a temperature compensating and load regulating active bias circuit for RF power amplifiers.
RF devices and circuits, such as used in cellular telephones and cellular telephone base stations, include power amplifiers. An amplifier provides a linear response if it""s output is the same as it""s input except that it has a different magnitude. In RF systems, one reason a linear response is required is because when two or more signals are input to a non-linear device, intermodulation noise is created, which can interfere with a desired signal. Intermodulation noise, as well as other performance factors of a power amplifier, which include gain, power added efficiency (PAE), output power, and adjacent channel powers (ACP) are functions of bias current. Thus, the bias current is a critical design factor.
Bias current is affected by temperature and process variations, as well as RF power variations. As is well known, cell phones and base stations are often exposed to a broad temperature range and varying RF power. Thus, there is a need to compensate for changes of bias current over temperature and power. Further, in order to improve the gain flatness and the linearity of power amplifiers for linear applications such as TDMA and CDMA power amplifiers, an active bias circuit should maintain the power amplifier""s quiescent current at a fixed value over a wide range of temperatures. For saturated applications, such as GSM and analog power amplifiers, an active bias circuit should compensate for a bias voltage drop across the RF blocking resistor caused by the self-bias effect of nonconducting classes of power amplifiers (e.g., Class AB, B, C) and supply a significant amount of current to a power amplifier stage under a high RF driving power.
FIG. 1 is a schematic circuit diagram of a conventional power amplifier circuit 10. The power amplifier circuit 10 includes a RF power amplifier PA and a current mirror circuit having a single transistor Q1 for bias voltage adjustment. The transistor Q1 is used to track variations of threshold voltage over temperature and process. First and second resistors R1, R2 are provided to set the bias voltage of the RF PA stage. The first resistor R1 is connected between the drain of the transistor Q1 and a reference voltage source Vref. The second resistor R2 has a first terminal connected to a node N1 between the first resistor R1 and the drain of the transistor Q1 and a second terminal connected ground.
A RF blocking resistor RB has a first terminal connected to the gate of the power amplifier PA and a second terminal connected to one side of a set resistor RS and to the node N1. The other side of the set resistor RS is connected to the gate of the transistor Q1. A RF decoupling capacitor C1 is connected between the node N1 and ground. The RF blocking resistor RB and the decoupling capacitor C1 prevent RF signals from entering the bias circuit. The set resistor RS is used to set any voltage difference caused by current leaking between the RF PA stage and the transistor Q1. Although the power amplifier circuit 10 can provide bias voltage adjustment, it is not capable of current sourcing or load regulation.
FIG. 2 is a schematic circuit diagram of a second conventional power amplifier circuit 20. The power amplifier circuit 20 includes a power amplifier PA and a current mirror circuit including a first transistor Q1 and a second transistor Q2. The first transistor Q1 is used to track variations of threshold voltage over temperature and process. A first resistor R1 connected between the first transistor Q1 and a reference voltage Vref is used to set the bias current of the first transistor Q1. A second resistor R2, which is connected to a node N1 between the power amplifier PA and the first and second transistors Q1, Q2, and ground, is used to improve breakdown. The circuit 20 also has a RF blocking resistor Rb and a RF decoupling capacitor C1. The blocking resistor Rb and the decoupling capacitor C1 are used to prevent RF signals entering the bias circuit. First and second set resistors RS1 and RS2 are used to set any voltage difference caused by current leaking between the RF PA stage and the current mirror circuit. Although the second conventional power amplifier circuit 20 provides some measure of compensation for temperature and process variation, the circuit 20 does not have adequate capabilities to compensate for current variations over temperature and overcome the de-biasing effect at high RF drive. Further, the second resistor R2 consumes very large amounts of current for all operations.
It is an object of the present invention to provide an active bias circuit for a power amplifier that provides good compensation for variations in temperature and power.
In order to provide an active bias circuit for a power amplifier, the present invention provides an active bias circuit connected to a power amplifier. The active bias circuit includes first and second current mirror circuits connected to the power amplifier for maintaining a DC quiescent current to the amplifier at a generally fixed value over a wide temperature range. The power amplifier is an element of the second current mirror circuit. A temperature compensation circuit is connected to the first current mirror circuit for providing temperature compensation therewith. A first reference voltage source is connected to the first current mirror circuit by way of the temperature compensation circuit for providing a first reference voltage Vref to the first current mirror circuit. A current sink is connected to a transistor of the first current mirror circuit and a voltage source adjustment circuit is connected to the first current mirror circuit for setting a voltage provided to the first current mirror circuit.
In another embodiment, the invention provides an active bias circuit for maintaining a power amplifier DC quiescent current at a fixed value over a wide temperature range. The active bias circuit has first and second current mirror circuits. The first current mirror circuit includes a first transistor Q1, a second transistor Q2 having a gate connected to a drain of the first transistor Q1 and a drain connected to a first reference voltage source for receiving a first reference voltage Vref, and a fourth transistor Q4 having a drain connected to a second reference voltage source for receiving a second reference voltage Vabc, and a gate connected to a source of the second transistor Q2 and to a gate of the first transistor Q1. The second current mirror circuit includes the fourth transistor Q4, a third transistor Q3 having a drain connected to the source of the second transistor Q2 at a first node N1, and a source connected to ground, and a power amplifier having a drain connected to a third reference voltage source for receiving a third reference voltage Vdd, a source connected to ground, and a gate connected to a gate of the third transistor Q3 at a second node N2. A temperature compensation circuit includes a first resistor R1 and a second resistor R2. The first resistor R1 has a first terminal connected to the first reference voltage source and a second terminal connected to the drain of the second transistor Q2. The second resistor R2 has a first terminal connected to the second terminal of the first resistor R1 and a second terminal connected to the drain of the first transistor Q1. A voltage source adjustment circuit includes a set resistor Rset connected between a source of the first transistor Q1 and ground.